1. Field of Invention
The present invention relates to a method of fabricating semiconductor devices. More particularly, the present invention relates to a method of fabricating node contacts.
2. Description of Related Art
Dynamic random access memory is one of the most broadly used integrated circuit devices. Developing a dynamic random access memory with a higher storage capacity is always a demand accompanying the growth of industrial application. Within each memory cell of a dynamic random access memory, a node contact is employed for connecting a capacitor and a transistor. A conventional method for fabricating a node contact includes defining a dielectric layer above a substrate to form a node contact opening that exposes the substrate, and filling the node contact opening with conductive material. The node contact establishes electrical connection between metal lines and source/drain region in the substrate, and between the metal lines and the metal gate of the transistor.
FIGS. 1A through 1C show a conventional method of fabricating a node contact. In FIG. 1A, metal silicide line 106 is formed on a substrate 100, wherein the substrate 100 includes pre-formed conductive device 102 and a first insulating layer 104. Spacers 108 are then formed on the lateral sides of the metal silicide line 106. Next, a second insulating layer 110 is formed on the first insulating layer 104. A photoresist layer 112 is formed on the second insulating layer 110 and is then defined by using a node contact mask.
In FIG. 1B, an etching process is performed to form a contact opening 114 on the second insulating layer 112. As shown in FIG. 1C, another etching process is performed to remove a portion of the first insulating layer 104 to further deepen the contact opening 114 for forming the node contact opening by using the previously formed contact opening 114 as a etching mask, wherein the node contact opening 114 exposes the conductive device 102. Finally, conductive material 116 is filled into the node contact opening 114 to form a node contact.
However, in the conventional method, a node contact mask must be used to define the layout of node contacts, and two insulating layers are to be etched through for forming the desired node contact openings, a relatively long etching process is required. A long etching process and employing a node contact mask usually lead to problems such as misalignment. In addition, the complexity of the conventional method also increases the manufacturing cost.
Accordingly, one object of the present invention is to provide a method of fabricating a node contact to simplify the fabrication process and reduce manufacturing cost.
Another object of the invention is to provide a method of fabricating a node contact for preciously forming node contacts that are electrically connected to conductive devices formed underneath.
It is also an object of the invention to provide a method of fabricating a node contact which forms metal silicide lines and devices on a substrate containing conductive devices and a first insulating layer without additional manufacturing processes.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of fabricating a node contact that defines the layout of node contact during the step of forming metal silicide lines and devices. The spacers surrounding the metal silicide lines and devices are also used to construct the node contact openings. Hence, the fabrication process is simplified, and the manufacturing cost is reduced indeed.
The method of the invention forms metal silicide lines and devices on a substrate containing conductive devices and a first insulating layer with a layout that defines predetermined spaces between metal silicide lines and devices. A silicon nitride layer is then formed on the metal silicide lines and devices, wherein the thickness of the silicon nitride layer is greater than one half of the distance separating the silicide line and device. The upper profile of the substrate containing metal silicide lines and devices automatically forms trenches after the step of forming the silicon nitride layer, wherein those trenches are later to be further etched for forming node contact openings. An etching process is then performed to form spacers around the metal silicide lines and devices, wherein the spaces between the spacers are the desired node contact openings. A portion of the first insulating layer exposed by the node contact openings is removed by an etching process to expose the conductive devices and to further deepen the node contact openings. The node contact openings are then filled with conductive material to form node contacts. A second insulating layer is formed on the substrate and then defined to expose the node contacts. Finally, a capacitor is formed by a conventional method, wherein the capacitor is electrically coupled with the node contacts.
The most significant features of the invention include arranging the layout of metal silicide lines and devices, and forming a silicon nitride layer of a certain thickness. While arranging the layout, the distance separating two metal silicide devices is greater than that separating a metal silicide line and a metal silicide device. The thickness of silicon nitride layer is greater than one half of the distance separating a metal silicide line and a metal silicide device. The step of depositing silicon nitride layer forms pits or trenches, which are processed into node contact openings later. The method of the invention forms node contact openings at the same time when the spacers are formed without using a node contact mask, so the fabricating process is simplified.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.